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ADS-939
16-Bit, 10MHz Sampling A/D Converters
PRELIMINARY DATA
FEATURES 16-bit resolution 10MHz sampling rate Functionally complete No missing codes over full military temperature range Edge-triggered 5V, 12V or 15V supplies, 1.5 Watts Small, 40-pin, ceramic TDIP 82dB SNR, -86dB THD Ideal for both time and frequency-domain applications GENERAL DESCRIPTION
The ADS-939 is a 16-bit, 10MHz sampling A/D converter. This device accurately samples full-scale input signals up to Nyquist frequencies with no missing codes. The dynamic performance of the ADS-939 has been optimized to achieve a signal-to-noise ratio (SNR) of 82dB and a total harmonic distortion (THD) of -86dB. Packaged in a 40-pin TDIP, the functionally complete ADS-939 contains a fast-settling sample-hold amplifier, a subranging (two-pass) A/D converter, an internal reference, timing/control logic, and error-correction circuitry. Digital input and output levels are TTL. The ADS-939 only requires the rising edge of the start convert pulse to operate. Requiring 5V supplies and either 12v or 15V supplies the ADS-939 dissipates 3.0 Watts. The device is offered with a bipolar (2.75V) or a unipolar (0 to -5.5V) analog input range. Models are available for use in either commercial (0 to +70C) or military (-55 to +125C) operating temperature ranges. A proprietary, auto-calibrating, error-correcting circuit enables the device to achieve specified performance over the full military temperature range. Typical applications include medical imaging, radar, sonar, communications and instrumentation.
INPUT/OUTPUT CONNECTIONS
PIN FUNCTION PIN FUNCTION
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
+3.2V REF. OUT UNIPOLAR ANALOG INPUT ANALOG GROUND OFFSET ADJUST GAIN ADJUST DIGITAL GROUND NC NC NC NC START CONVERT BIT 16 (LSB) BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
+12V/+15V -12V/-15V +5V ANALOG SUPPLY -5V SUPPLY ANALOG GROUND COMP. BITS OUTPUT ENABLE OVERFLOW EOC +5V DIGITAL SUPPLY DIGITAL GROUND BIT 1 (MSB) BIT 1 (MSB) BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8
10 FSTAT1 11 FSTAT2
POWER AND GROUNDING
GAIN ADJUST 6
+5V ANALOG SUPPLY +5V DIGITAL SUPPLY -5V SUPPLY ANALOG GROUND DIGITAL GROUND -12/-15V ANALOG SUPPLY +12/+15V ANALOG SUPPLY
38 31
+3.2V REF. OUT 1 POWER AND GROUNDING +5V ANALOG SUPPLY +5V DIGITAL SUPPLY -5V SUPPLY ANALOG GROUND DIGITAL GROUND NO CONNECTION 38 31 37 2, 4, 36 7, 30 39, 40 OFFSET ADJUST 5
GAIN ADJUST CKT.
8 FIFO/DIR 9 FIFO/READ 29 BIT 1 (MSB) 28 BIT 1 (MSB) 2-PASS ANALOG-TO-DIGITAL CONVERTER
37 4, 36 7, 30 39 40
PRECISION +3.2V REFERENCE
27 BIT 2 26 BIT 3 25 BIT 4 CUSTOM GATE ARRAY 3-STATE OUTPUT REGISTER 24 BIT 5 23 BIT 6 22 BIT 7 21 BIT 8 20 BIT 9 19 BIT 10 18 BIT 11 17 BIT 12 16 BIT 13 15 BIT 14 14 BIT 15 13 BIT 16 (LSB) 34 OUTPUT ENABLE 33 OVERFLOW
OFFSET ADJUST CKT.
UNIPOLAR 2
ANALOG INPUT 3 S/H
START CONVERT 12 EOC 32
TIMING AND CONTROL LOGIC
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COMP. BITS 35
Figure 1. ADS-939 Functional Block Diagram
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MDA_ADS-939.A01 Page 1 of 7
ADS-939
16-Bit, 10MHz Sampling A/D Converters
ABSOLUTE MAXIMUM RATINGS
PARAMETERS +5V Supply (Pins 31, 38) -5V Supply (Pin 37) +12V/+15V Supply (pin 40) -12V/-15V Supply (pin 39) Digital Inputs (Pins 8, 9, 12, 34, 35) Analog Input (Pin 3) Lead Temperature (10 seconds) LIMITS 0 to +6 0 to -6 0 to +16V 0 to +16V -0.3 to +VDD +0.3 5 +300 UNITS Volts Volts Volts Volts Volts Volts C
PHYSICAL/ENVIRONMENTAL
PARAMETERS Operating Temp. Range, Case ADS-939MC ADS-939MM Thermal Impedance jc ca Storage Temperature Range Package Type Weight unless otherwise specified.) -55 to +125C MAX. -- -- -- -- 15 MIN. -- -- -- -- -- TYP. 0 to -5.5V 2.75 400 480 10 MAX. -- -- -- -- 15 UNITS Volts Volts pF TYP. 0 to -5.5V 2.75 400 480 10 MIN. 0 -55 -- -- -65 TYP. -- -- MAX. +70 +125 UNITS C C
4 -- C/Watt 18 -- C/Watt -- +150 C 40-pin, metal-sealed, ceramic TDIP 0.56 ounces (16 grams)
FUNCTIONAL SPECIFICATIONS
(TA = +25C, VCC = 12/15V, +VDD = 5V, 10MHz sampling rate, and a minimum 3 minute warm-up +25C ANALOG INPUT Input Voltage Range Unipolar Bipolar Input Resistance (Pin 3) (Pin 2) Input Capacitance DIGITAL INPUTS Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Start Convert Positive Pulse Width STATIC PERFORMANCE Resolution Integral Nonlinearity Differential Nonlinearity (fin = 10kHz) Full Scale Absolute Accuracy Bipolar Zero Error (Tech Note 2) Bipolar Offset Error (Tech Note 2) Gain Error (Tech Note 2) No Missing Codes (fin = 10kHz) DYNAMIC PERFORMANCE Peak Harmonics (-3dB) dc to 500kHz 500kHz to 5MHz Total Harmonic Distortion (-3dB) dc to 500kHz 500kHz to 5MHz Signal-to-Noise Ratio (w/o distortion, -3dB) dc to 500kHz 500kHz to 5MHz Signal-to-Noise Ratio (& distortion, -3dB) dc to 500kHz 500kHz to 5MHz Noise Two-Tone Intermodulation Distortion (fin = 200kHz, 240kHz, fs = 10MHz, -3dB) Input Bandwidth (-3dB) Small Signal (-20dB input) Large Signal (-0.5dB input) Feedthrough Rejection (fin = 1MHz) Slew Rate Aperture Delay Time Aperture Uncertainty S/H Acquisition Time ( to 0.001%FSR, 5.5V step) Overvoltage Recovery Time A/D Conversion Rate -- -- -- -- TBD TBD TBD TBD -- -- -- -- -- -- -- -- -- -- 10 -87 -82 -86 -81 86 85 82 81 80 -87 25 15 90 400 4 0.2 40 100 -- TBD TBD TBD TBD -- -- -- -- -- -85 -- -- -- -- -- -- -- -- -- -- -- -- -- TBD TBD TBD TBD -- -- -- -- -- -- -- -- -- -- 10 -87 -82 -86 -81 86 85 82 81 80 -87 25 25 90 400 4 0.2 40 100 -- TBD TBD TBD TBD -- -- -- -- -- -85 -- -- -- -- -- -- -- -- -- -- -- -- -- TBD TBD TBD TBD -- -- -- -- -- -- -- -- -- -- 10 -82 -78 -81 -77 80 80 78 75 80 -87 25 15 90 400 4 0.2 45 100 -- TBD TBD TBD TBD -- -- -- -- -- -82 -- -- -- -- -- -- -- -- -- dB dB dB dB dB dB dB dB Vrms dB MHz MHz dB V/s ns ps rms ns ns MHz -- -- -0.95 -- -- -- -- 16 16 1 0.5 0.15 0.1 0.1 0.15 -- -- -- +1.0 0.3 0.2 0.2 0.3 -- -- -- -0.95 -- -- -- -- 16 16 1.5 0.5 0.3 0.2 0.2 0.3 -- -- -- +1.0 0.5 0.4 0.4 0.5 -- -- -- -0.95 -- -- -- -- 16 16 2 0.5 0.5 0.4 0.4 0.5 -- -- -- +1.5 0.8 0.6 0.6 0.8 -- Bits LSB LSB %FSR %FSR %FSR % Bits +2.0 -- -- -- 20 -- -- -- -- 50 -- +0.8 +20 -20 -- +2.0 -- -- -- 20 -- -- -- -- 50 -- +0.8 +20 -20 -- +2.0 -- -- -- 20 -- -- -- -- 50 -- +0.8 +20 -20 -- Volts Volts A A ns MIN. -- -- -- -- -- TYP. 0 to -5.5V 2.75 400 480 10 MAX. -- -- -- -- 15 MIN. -- -- -- -- -- 0 to +70C
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ADS-939
16-Bit, 10MHz Sampling A/D Converters
DYNAMIC PERFORMANCE (Cont.) ANALOG OUTPUT Internal Reference Voltage Drift External Current DIGITAL OUTPUTS Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Output Coding POWER REQUIREMENTS Power Supply Ranges +5V Supply -5V Supply +12V Supply -12V Supply +15V Supply -15V Supply Power Supply Currents +5V Supply -5V Supply -12/15V Supply +12/15V Supply Power Dissipation Power Supply Rejection +4.75 -4.75 +11.5 -11.5 +14.5 -14.5 -- -- -- -- -- -- +5.0 -5.0 +12.0 -12.0 +15.0 -15.0 +50 -36 -25 +70 1.5 -- +5.25 -5.25 +12.5 -12.5 +15.5 -15.5 -- -- -- -- TBD 0.07 +4.75 -4.75 +11.5 -11.5 +14.5 -14.5 -- -- -- -- -- -- +5.0 -5.0 +12.0 -12.0 +15.0 -15.0 TBD TBD TBD TBD TBD -- +5.25 -5.25 +12.5 -12.5 +15.5 -15.5 -- -- -- -- TBD 0.07 +4.9 -4.9 +11.5 -11.5 +14.5 -14.5 -- -- -- -- -- -- +5.0 -5.0 +12.0 -12.0 +15.0 -15.0 TBD TBD TBD TBD TBD -- +5.25 -5.25 +12.5 -12.5 +15.5 -15.5 -- -- -- -- TBD 0.07 Volts Volts Volts Volts Volts Volts mA mA mA mA Watts %FSR/%V +2.4 -- -- +2.4 -- -- +2.4 -- -- -- -- +0.4 -- -- +0.4 -- -- +0.4 -- -- -4 -- -- -4 -- -- -4 -- -- +4 -- -- +4 -- -- +4 (Offset) Binary / Complementary (Offset) Binary / Two's Complement / Complementary Two's Complement Volts Volts mA mA -- -- -- +3.2 30 5 -- -- -- -- -- -- +3.2 30 5 -- -- -- -- -- -- +3.2 30 5 -- -- -- Volts ppm/C mA MIN. +25C TYP. MAX. MIN. 0 TO +70C TYP. MAX. MIN. -55 TO +125C TYP. MAX. UNITS
Footnotes:
All power supplies must be on before applying a start convert pulse. All supplies and the clock (START CONVERT) must be present during warm-up periods. The device must be continuously converting during this time. When COMP. BITS (pin 35) is low, logic loading "0" will be -350A. A 10MHz clock with a 50nsec positive pulse width is used for all production testing. See Timing Diagram for more details. Effective bits is equal to:
(SNR + Distortion) - 1.76 + 20 log 6.02 Full Scale Amplitude Actual Input Amplitude
This is the time required before the A/D output data is valid once the analog input is back within the specified range. See table 2a, Setting Output Coding Selection. The minimum supply voltages of +4.9V and -4.9V for VDD are required for -55C operation only. The minimum limits are +4.75V and -4.75V when operating at +125C. 12V only or 15V only required.
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-939A requires careful attention to pc-card layout and power supply decoupling. The device's analog and digital ground systems are connected to each other internally. For optimal performance, tie all ground pins (4, 7, 30 and 36) directly to a large analog ground plane beneath the package. For the best performance it is recommended to use a single power source for both the +5V analog and +5V digital supplies. Bypass all power supplies and the +3.2V reference output to ground with 4.7F tantalum capacitors in parallel with 0.1F ceramic capacitors. Locate the bypass capacitors as close to the unit as possible. 2. The ADS-939A achieves its specified accuracies without the need for external calibration. If required, the device's small initial offset and gain errors can be reduced to zero using the adjustment circuitry shown in Figure 2. When using this circuitry, or any similar offset and gain calibration hardware, make adjustments following warm-up. To avoid interaction, always adjust offset before gain. Tie pins 5 and 6 to ANALOG GROUND (pin 4) if not using offset and gain adjust circuits. 3. Pin 35 (COMP. BITS) is used to select the digital output coding format of the ADS-939A. See Tables 2a and 2b. When this pin has a TTL logic "0" applied, it complements all of the ADS-939A's digital outputs. When pin 35 has a logic "1" applied, the output coding is comple-
4.
5.
6.
7.
mentary (offset) binary. Applying a logic "0" to pin 35 changes the coding to (offset) binary. Using the MSB output (pin 29) instead of the MSB output (pin 28) changes the respective output codings to complementary two's complement and two's complement. Pin 35 is TTL compatible and can be directly driven with digital logic in applications requiring dynamic control over its function. There is an internal pull-up resistor on pin 35 allowing it to be either connected to +5V or left open when a logic "1" is required. To enable the three-state outputs, connect OUTPUT ENABLE (pin 34) to a logic "0" (low). To disable, connect pin 34 to a logic "1" (high). Applying a start convert pulse while a conversion is in progress (EOC = logic "1") will initiate a new and probably inaccurate conversion cycle. Data from both the interrupted and subsequent conversions will be invalid. Do not enable/disable or complement the output bits or read from the FIFO during the conversion process (from the rising edge of EOC to the falling edge of EOC). The OVERFLOW bit (pin 33) switches from 0 to 1 when the input voltage exceeds that which produces an output of all 1's or when the input equals or exceeds the voltage that produces all 0's. When COMP BITS is activated, the above conditions are reversed.
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MDA_ADS-939.A01 Page 3 of 7
ADS-939
16-Bit, 10MHz Sampling A/D Converters
CALIBRATION PROCEDURE
Connect the converter per Figure 2. Any offset/gain calibration procedures should not be implemented until the device is fully warmed up. To avoid interaction, adjust offset before gain. The ranges of adjustment for the circuits in Figure 2 are guaranteed to compensate for the ADS-939's initial accuracy errors and may not be able to compensate for additional system errors. A/D converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. This is accomplished by connecting LED's to the digital outputs and performing adjustments until certain LED's "flicker" equally between on and off. Other approaches employ digital comparators or microcontrollers to detect when the outputs change from one code to the next. For the ADS-939, offset adjusting is normally accomplished when the analog input is 0 minus 1/2 LSB (-42V). See Table 2b for the proper bipolar output coding. Gain adjusting is accomplished when the analog input is at nominal full scale minus 11/2 LSB's (+2.749874V or -5.499874V). Note: Connect pin 5 to ANALOG GROUND (pin 4) for operation without zero/offset adjustment. Connect pin 6 to pin 4 for operation without gain adjustment.
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input (pin 12) so that the converter is continuously converting. 2. For zero/offset adjust, apply -42V to the ANALOG INPUT (pin 3). 3. For bipolar operation - Adjust the offset potentiometer until the code flickers between 1000 0000 0000 0000 and 0111 1111 1111 1111 with pin 35 tied high (complementary offset binary) or between 0111 1111 1111 1111 and 1000 0000 0000 0000 with pin 35 tied low (offset binary). For unipolar operation - Adjust the offset potentiometer until all outputs are 1's and the LSB flickers between 0 and 1 with pin 35 tied high (complementary binary) or until all outputs are 0's and the LSB flickers between 0 and 1 with pin 35 tied low (binary). 4. For bipolar, Two's complement coding requires using BIT 1 (MSB) (pin 29). With pin 35 tied low, adjust the trimpot until the output code flickers between all 0's and all 1's.
Gain Adjust Procedure
Figure 2. Connection Diagram
1. For gain adjust, for bipolar apply +2.749874V and for unipolar mode 5.499874V to the ANALOG INPUT (pin 3). 2. Adjust the gain potentiometer until all output bits are 0's and the LSB flickers between a 1 and 0 with pin 35 tied high (complementary (offset) binary) or until all output bits are 1's and the LSB flickers between a 1 and 0 with pin 35 tied low ((offset) binary). 3. For bipolar, Two's complement coding requires using BIT 1 (MSB) (pin 29). With pin 35 tied low, adjust the gain trimpot until the output code flickers equally between 0111 1111 1111 1111 and 0111 1111 1111 1110. 4. To confirm proper operation of the device, vary the applied input voltage to obtain the output coding listed in Table 2b.
Table 2a. Setting Output Coding Selection (Pin 35)
OUTPUT FORMAT
Complementary (Offset) Binary (Offset) Binary Complementary Two's Complement (Using MSB, pin 29) Two's Complement (Using MSB, pin 29)
PIN 35 LOGIC LEVEL
1 0 1 0
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MDA_ADS-939.A01 Page 4 of 7
ADS-939
16-Bit, 10MHz Sampling A/D Converters
Table 2b. Output Coding COMP. BINARY BINARY COMP. TWO'S COMP. TWO'S COMP. INPUT RANGE BIPOLAR 2.75V SCALE +2.749916 +FS -1 LSB +2.749874 +FS -1 1/2 LSB +2.062500 +3/4 FS +1.375000 +1/2 FS 0.000000 0 -0.000084 -1 LSB -1.375000 -1/2 FS -2.062500 -3/4 FS -2.749916 -FS +1 LSB -2.749958 -FS + 1/2 LSB -2.750000 -FS
INPUT RANGE UNIPOLAR MSB LSB MSB LSB 0 to -5.5V SCALE 0 -1 LSB -0.000084 1111 1111 1111 1111 0000 0000 0000 0000 LSB "1" to "0" LSB "0" to "1" 0 -1 1/2 LSB -0.000126 0 - 1/8 FS -0.687500 1110 0000 0000 0000 0001 1111 1111 1111 0 - 1/4 FS -1.375000 1100 0000 0000 0000 0011 1111 1111 1111 -1/2 FS - 1/2LSB -2.749958 1000 0000 0000 0000 0111 1111 1111 1111 -1/2 LSB -2.750000 0111 1111 1111 1111 1000 000 000 0000 -3/4 FS -4.125000 0100 0000 0000 0000 1011 1111 1111 1111 -7/8 FS -4.812500 0010 0000 0000 0000 1101 1111 1111 1111 -FS +1 LSB -5.499916 0000 0000 0000 0001 1111 1111 1111 1110 LSB "0" to "1" LSB "1" to "0" -FS + 1/2 LSB -5.499958 -FS -5.500000 0000 0000 0000 0000 1111 1111 1111 1111 OFFSET BINARY COMP. OFF. BIN.
MSB LSB 0111 1111 1111 1111 LSB "1" to "0" 0110 0000 0000 0000 0100 0000 0000 0000 0000 0000 0000 0000 1111 1111 1111 1111 1100 0000 0000 0000 1010 0000 0000 0000 1000 0000 0000 0001 LSB "0" to "1" 1000 0000 0000 0000 TWO'S COMP.
MSB LSB 1000 0000 0000 0000 LSB "0" to "1" 1001 1111 1111 1111 1011 1111 1111 1111 1111 1111 1111 1111 0000 0000 0000 0000 0011 1111 1111 1111 0101 1111 1111 1111 0111 1111 1111 1110 LSB "1" to "0" 0111 1111 1111 1111 COMP. TWO'S COMP.
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and specified over operating temperature (case) ranges of 0 to +70C and -55 to +125C. All room-temperature (TA = +25C) production testing is performed without the use of heat sinks or forced-air cooling. Thermal impedance figures for each device are listed in their respective specification tables. These devices do not normally require heat sinks, however, standard precautionary design and layout procedures should be used to ensure devices do not overheat. The ground and power planes beneath the package, as well as all pcb signal runs to and from the device, should be as heavy as possible to help conduct heat away from the package. Electrically insulating, thermally-conductive "pads" may be installed
Scale is approximately 25ns per division. fs = 10MHz
underneath the package. Devices should be soldered to boards rather than "socketed", and of course, minimal air flow over the surface can greatly help reduce the package temperature. In more severe ambient conditions, the package/junction temperature of a given device can be reduced dramatically (typically 35%) by using one of DATEL's HS Series heat sinks. See Ordering Information for the assigned part number. See page 1-183 of the DATEL Data Acquisition Components Catalog for more information on the HS Series. Request DATEL Application Note AN-8, "Heat Sinks for DIP Data Converters," or contact DATEL directly, for additional information.
N
N+1 50ns
N+2
N+3
N+4
N+5
N+6
N+7
START CONVERT
N+8
5ns typ.
35ns
INTERNAL S/H
65ns
60ns
10ns typ.
EOC
40ns 20ns typ.
OUTPUT DATA
N-8
N-7 20ns typ.
N-6
N-5
N-4
N-3
N-2
N-1
N
Figure 3. ADS-939 Timing Diagram
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MDA_ADS-939.A01 Page 5 of 7
R1 R2 +5VA SG7 +15V 9 8 7 DGND 6 5 4 UUT +3.2VREF AGND ANA IN AGND OFFSET GAIN DGND FIFO/DIR READ FSTAT1 FSTAT2 START LSB ADS-939 B2 AB2 AB3 AB4 AB5 AB6 22 B7 U6 B8 21 AB7 AB8 C17 0.1F DGND 20 AB16 AB15 AB14 AB13 -5VA 1 2 10 L4 +5VA GAIN ADJUST +5VA OFFSET ADJUST 1 2 3 -5VA R4 20k 1 2 3 +5VA R5 20k DGND -5VA 20mH C13 2.2F 9 +5VF 13 12 14 U5 3 FST1 7 74HC86 DGND +5VF DGND C8 0.1F DGND 74HC86 U5 3 EOC AB12 AB11 AB10 74HC86 8 U5 FST2 AB9 9 8 7 6 5 4 3 2 11 1 74HCT573 U4 10 12 13 14 15 16 17 18 19 B3 B4 B5 B6 23 24 25 26 27 +5VF B15 B14 B13 B12 B11 B10 B9 MSB AB1 28 AB7 AB8 MSB 29 3 2 11 1 AB6 4 DGND 30 AB5 5 +5VD 31 +5VD AB4 6 74HCT573 EOC 32 DGND AB3 7 OF 14 15 16 17 18 19 33 AB2 8 13 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 DGND B16 (LSB) B15 B14 B13 B12 B11 B10 B9 +5VD COMP RD FIF 1 2 3 J2 123 123 123 J3 J4 J5 ENABLE COMPLIM READ FIFO/DIR B15 B16 (LSB) START ENABLE 34 U3 AB1 9 12 COMP COMP 35 B1 (MSB) 20 10 DGND AGND 36 C16 0.1F -5VA 37 -5VA +5VA 38 11 1 +5VA +5VF -12/-15V 39 2 19 B1B MSB +12/+15V 40 B1(MSB) B2 B3 B4 B5 B6 B7 B8 3 18 OVRFLW AGND AGND DGND 0.1F 0.1F 17 DGND 74HCT573 16 C18 0.1F C19 0.1F C20 0.1F C14 2.2F 15 -15V AGND SG6 1 2 AGND 3 4 2 5 6 7 R3 1 DGND RD 10 11 12 J1 AB16 L1 +5VF AB14 AB13 AB12 L2 +5VD AB10 AB9 20 19 20mH AB11 18 17 16 15 20mH AB15 14 13 9 FIF 8 3.3k AGND 6 3
74HCT74
+5VF C15 0.1F 20 U2 13 14 +5VD +5VA -5VA +5VD -5VA +5VA C12 2.2F AGND C21 2.2F AGND 12 10 C3 0.1F C4 2.2F DGND
AGND C1 2.2F -5VA SG8 C2 2.2F
2 6
7
AMPLIFIER OPTION
AR1
3
4
ANALOG INPUT
B2 AGND +5VF SG5 SG9
2
AGND +5VF
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 P1 18 17 16 15 14 13 12 11 10 8 6 4 2 9 7 5 3 1
B1B MSB OVRFLW EOC DGND DGND DGND DGND DGND
12 4 U1 1 2 2 C10 1 33pF DGND 5
10
14
C5
11
U1
9
0.1F
74HCT74
7
13
8
DGND
DGND
+5VF
1
X1
14
Preliminary Evaluation Board - Modified ADS-B933 to include 12V or 15V Supplies to U6
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C7 2.2F DGND C9 2.2F L3 20mH C11 2.2F AGND 74HC86 4 U5 6 START CONVERT 5 AGND
7 10MHZ 8
C6 2.2F
DGND
DGND DGND ENABLE COMPLIM N.C. READ FIF/DIR FST1 FST2 DGND
START CONVERT
B1
R6
321
50
Figure 4. ADS-939 Evaluation Board Schematic.
+5VD
-5VA
DGND
-15V
26 24 22 20 18 16 14 12 10 8 6 4 2
25 23 21 19 17 15 13 11 9 7 5 3 1
+15V DGND +5VA
P2
SG1
SG2
SG3
SG4
16-Bit, 10MHz Sampling A/D Converters
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ADS-939
MDA_ADS-939.A01 Page 6 of 7
AGND
DGND
ADS-939
16-Bit, 10MHz Sampling A/D Converters
MECHANICAL DIMENSIONS INCHES (mm)
2.12/2.07 (53.85/52.58) Dimension Tolerances (unless otherwise indicated): 2 place decimal (.XX) 0.010 (0.254) 3 place decimal (.XXX) 0.005 (0.127) Lead Material: Kovar alloy Lead Finish: 50 microinches (minimum) gold plating over 100 microinches (nominal) nickel plating
40
21
1.11/1.08 (28.20/27.43)
1
20
0.100 TYP. (2.540) 1.900 0.008 (48.260) 0.245 MAX. (6.223)
PIN 1 INDEX ( ON TOP)
0.200/0.175 (5.080/4.445)
0.015/0.009 (0.381/0.229) 0.210 MAX. (5.334) 0.018 0.002 (0.457) 0.045/0.035 (1.143/0.889) 0.110/0.090 (2.794/2.286) SEATING PLANE 0.035/0.015 (0.889/0.381) 0.900 0.010 (22.86) 0.110/0.090 (2.794/2.286
ORDERING INFORMATION
OPERATING TEMP. RANGE 0 to +70C -55 to +125C
MODEL ADS-939MC ADS-939MM
ACCESSORIES ADS-B939 HS-40 Evaluation Board (without ADS-939) Heat Sink for all ADS-939 models
Receptacles for PC board mounting can be ordered through AMP, Inc., Part # 3-331272-8 (Component Lead Socket), 40 required. For MIL-STD-883 product, or surface mount packaging, contact DATEL.
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